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专利名称：Input and output port control unit发明人：Ishii, Takatoshi申请号：EP83109090申请日：19830914公开号：EP0104545A3公开日：19851204
专利附图：
摘要：An input and output port control unit which is adapted to a microcomputersystem including an interrupt request line (19), address/control bus (15) and data bus(17), a plurality of extension boards (13i), each board (13i) including an I/0 logic circuit (23)for producing an interrupt request signal. The interrupt request signal is transferred to
the microcomputer system through an interrupt request flip-flop (27), NAND gate (35)and a common interrupt request line (19). The microcomputer, in response to theinterrupt request signal outputs a common port address to those extension boards (13i)through an address/control bus (15). The common port address is decoded by a decoder(25). The output signal from the decoder (25) and the interrupt request signal form aninterrupt request identifying signal with a flip-flop (29) and NAND gates (31, 33). Theinterrupt request identifying signal is transferred through a predetermined bit line of adata bus (17) to the microcomputer system.
申请人：KABUSHIKI KAISHA TOSHIBA
代理人：Henkel, Feiler, Hänzel & Partner
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