Dual Temperature-Controlled Resistors withExternal Temperature Input and Monitors
General DescriptionFeaturesThe DS1857 dual temperature-controlled nonvolatile(NV) variable resistors with external temperature input♦Four Total Monitored Channels (Temperature,Vand monitors consists of two 50kΩ256-position linearCC, MON1, MON2)
variable resistors, two analog monitor inputs (MON1,♦Two External Analog Inputs (MON1, MON2)
MON2), and an external temperature sensor input. The♦Interface to External Temperature Sensor (LM50)device provides an ideal method for setting and tem-perature-compensating bias voltages and currents in♦Two 50kTemperature-Controlled Variable ResistorsΩ, Linear, 256-Position, Nonvolatilecontrol applications using minimal circuitry. The vari-able resistor settings are stored in EEPROM memory♦Resistor Settings Changeable Every 2°Cand can be accessed over the 2-wire serial bus.
♦Access to Monitoring and ID Information
Configurable with Separate Device Addresses♦Resistor Disable (Open-Circuit) Function♦2-Wire Serial Interface
♦Three Address Lines for Multiple DevicesApplications
♦Operates from a 3.3V or 5V Supply♦SFF-8472 Compatible
Optical TransceiversOptical Transponders
Instrumentation and Industrial ControlsOrdering InformationRF Power Amps
PARTTEMP RANGEPIN-PACKAGEDiagnostic Monitoring
DS1857E-050-40°C to +95°C16 TSSOPDS1857E-050/T&R-40°C to +95°C16 TSSOP(Tape-and-Reel)DS1857B-050-40°C to +95°C16 Ball CSBGATypical Operating CircuitPin Configurations
VCCVCC = 3.3V4.7kΩ4.7kΩ0.1µFDECOUPLINGTOP VIEW1CAP2-WIRE SDAVCC16INTERFACEA1SDAV2A1SCLVCC16TO LASER BIASCCH1VSCLCCH115CONTROL2SCLH1153A0**L114B3A0L1144A1**H013TO LASER MODULATIONA2SDAH0L1DS18574A1H01312CONTROL5A2**L05A2DS1857GROUND TOCRHIZWPENA0EXTTMPL012DISABLE WRITE6EXTTMP11TO EXTERNAL TEMPERATURE6WPENEXTTMP11PROTECTWPEN10SENSOR, SUCH AS LM50Tx DISABLE7RHIZMON2Rx POWER*DIAGNOSTIC DGNDL0MON1MON27RHIZMON210Tx BIAS*INPUTS8GNDMON1GNDMON10 TO 2.5V FS91234*Rx POWER AND Tx BIAS CAN BE ARBITRARILY16-BALL CSBGA (4mm x 4mm)16 TSSOPASSIGNED TO THE MON INPUTS.1.0mm PITCH**ADDRESS INPUTS DETERMINE THE MAIN DEVICE 2-WIRE SLAVE ADDRESS WHEN ADFIX = 0. THIS ADDRESS MUST BE DIFFERENT THAN THE AUX DEVICE ADDRESS WHEN ADEN = 0.______________________________________________Maxim Integrated Products1
For pricing delivery, and ordering informationplease contact Maxim/Dallas Direct!at 1-888-629-42, or visit Maxim’s website at www.maxim-ic.com.
DS1857Dual Temperature-Controlled Resistors withExternal Temperature Input and MonitorsDS1857ABSOLUTE MAXIMUM RATINGS
Voltage on VCCRelative to Ground.......................-0.5V to +6.0VVoltage on Inputs Relative
to Ground*................................................-0.5V to VCC+ 0.5V Voltage on Resistor Inputs Relative
to Ground*................................................-0.5V to VCC+ 0.5V Current into Resistors............................................................5mA*Not to exceed 6.0V.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.
Operating Temperature Range...........................-40°C to +95°C Programming Temperature Range.........................0°C to +70°CStorage Temperature Range.............................-55°C to +125°CSoldering Temperature.......................................See IPC/JEDEC
J-STD-020A Specification
RECOMMENDED DC OPERATING CONDITIONS
(TA= -40°C to +95°C, unless otherwise noted.)
PARAMETERSupply VoltageInput Logic 1 (SDA, SCL, A2, A1, A0,WPEN, RHIZ)Input Logic 0 (SDA, SCL, A2, A1, A0,WPEN, RHIZ)Resistor Inputs (L0, L1, H0, H1)Resistor CurrentIRESSYMBOLVCCVIHVIL(Note 1)(Note 2)(Note 2)CONDITIONSMIN+3.00.7 x Vcc-0.3-0.3-3TYPMAX5.5VCC + 0.30.3 x VCCVCC + 0.3+3UNITSVVVVmADC ELECTRICAL CHARACTERISTICS
(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)PARAMETERSupply CurrentInput LeakageInput Current each I/O PinLow-Level Output Voltage (SDA)Full-Scale Input (MON1, MON2)Full-Scale VCC MonitorI/O CapacitanceWPEN Pullup ResistorRHIZ Pullup ResistorDigital Power-On ResetAnalog Power-On ResetCI/ORWPENRRHIZPODPOA40401.02.06565VOL1VOL2SYMBOLICCIIL0.4 x VCC < VI/O < 0.9 x VCC3mA sink current6mA sink current(Note 4)(Note 5)CONDITIONS(Note 3)-1-10002.48756.52082.50006.5536MINTYP1MAX2+1+100.40.62.51256.58101001002.22.6UNITSmAµAµAVVVpFkΩkΩVV2_____________________________________________________________________
Dual Temperature-Controlled Resistors withExternal Temperature Input and Monitors
ANALOGRESISTOR CHARACTERISTICS
(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSPosition 00h ResistanceTA = +25°C0.701.01.25kΩPosition FFh ResistanceTA = +25°C405060kΩAbsolute Linearity(Note 6)-2+2LSBRelative Linearity(Note 7)-1+1LSBTemperature Coefficient(Note 8)50ppm/°CHigh-Z Resistor CurrentIRHIZRHIZ = VCC0.1µAANALOG VOLTAGE MONITORING
(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSInput Resolution∆VMON610µVSupply Resolution∆VCC1.6mVInput/Supply AccuracyACC0.250.5% FS(full scale)Update Rate for MON1, MON2,Temp, or VCCtframe2030msEXTERNAL TEMPERATURE
(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSEXTTMP Input VoltageVEXTTMP1.779VConversion Resolution∆VEXTTMP625µVConversion AccuracyVEXTTMP(Note 9)12.8mV_____________________________________________________________________3
DS1857Dual Temperature-Controlled Resistors withExternal Temperature Input and MonitorsDS1857ACELECTRICAL CHARACTERISTICS
(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)PARAMETERSCL Clock FrequencyBus Free Time Between STOP andSTART ConditionHold Time (Repeated)START ConditionLow Period of SCL ClockHigh Period of SCL ClockData Hold TimeData Setup TimeStart Setup TimeRise Time of Both SDA and SCLSignalsFall Time of Both SDA and SCLSignalsSetup Time for STOP ConditionCapacitive Load for Each Bus LineEEPROM Write TimeSYMBOLfSCLtBUFtHD:STAtLOWtHIGHtHD:DATtSU:DATtSU:STAtFtRtSU:STOCBtWCONDITIONSFast mode (Note 10)Standard mode (Note 10)Fast mode (Note 10)Standard mode (Note 10)Fast mode (Notes 10, 11)Standard mode (Notes 10, 11)Fast mode (Note 10)Standard mode (Note 10)Fast mode (Note 10)Standard mode (Note 10)Fast mode (Notes 10, 12, 13)Standard mode (Notes 10, 12, 13)Fast mode (Note 10)Standard mode (Note 10)Fast mode (Note 10)Standard mode (Note 10)Fast mode (Note 13)Standard mode (Note 13)Fast mode (Note 13)Standard mode (Note 13)Fast modeStandard mode(Note 13)(Note 14)10MIN001.34.70..01.34.70..0001002500..720 + 0.1CB20 + 0.1CB20 + 0.1CB20 + 0.1CB0..040030010003003000.9TYPMAX400100UNITSkHzµsµsµsµsµsnsµsnsnsµspFmsNote 1:All voltages are referenced to ground.
Note 2: I/O pins of fast-mode devices must not obstruct the SDA and SCL lines if VCCis switched off. The address inputs should be
connected to either VCCor GND depending on the desired address setting.Note 3:SDA and SCL are connected to VCCand all other input signals are connected to well-defined logic levels.
Note 4: The maximum voltage the MON inputs will read is approximately 2.5V, even if the voltage on the inputs is greater than 2.5V.Note 5:This voltage is defining the maximum range of the analog-to-digital converter and not the maximum VCCvoltage.
Note 6: Absolute linearity is the difference of measured value from expected value at DAC position. The expected value is a
straight line from measured minimum position to measured maximum position.Note 7: Relative linearity is the deviation of an LSB DAC setting change vs. the expected LSB change. The expected LSB change
is the slope of the straight line from measured minimum position to measured maximum position.Note 8: See the Typical Operating Characteristics.
Note 9: The conversion accuracy does not include any error from the LM50.
Note 10: A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT> 250ns must then be met. This
is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch theLOW period of the SCL signal, it must output the next data bit to the SDA line tRMAX+ tSU:DAT= 1000ns + 250ns = 1250nsbefore the SCL line is released.
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Dual Temperature-Controlled Resistors withExternal Temperature Input and Monitors
ACELECTRICAL CHARACTERISTICS (continued)
(VCC= 3.0V to 5.5V, TA= -40°C to +95°C, unless otherwise noted.)Note 11: After this period, the first clock pulse is generated.
Note 12: The maximum tHD:DATonly to has be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
Note 13: A device must internally provide a hold time of at least 300ns for the SDA signal (see the VIH MIN of the SCL signal) in order
to bridge the undefined region of the falling edge of SCL.Note 14: CB—total capacitance of one bus line, timing referenced to 0.9 x VCCand 0.1 x VCC.Note 15: EEPROM write begins after a STOPcondition occurs.
Typical Operating Characteristics
(VCC= 5.0V, TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
SUPPLY CURRENT vs. VOLTAGE
7001070020ccoott 77558811SS660D650D))AAµµ(( TT600NNE620
ERRRRUUCC550 YYLLP580
PPPUU500SS540
450500
400
-40
-20
0
20
40
60
80
100
3.03.54.04.55.05.5
TEMPERATURE (°C)
VOLTAGE (V)
ACTIVE SUPPLY CURRENT RESISTANCE vs. SETTING
vs. SCL FREQUENCY
6030700
40ccoott 7755881150SSDA = 5VSD)DAµ660
( T)NΩEk40R( REU620
CCN AYT30LSPIPSUES580
R20 EVITCA10540
0500
0
50
100
150200
250
300
0
100
200
300
400
SETTING
SCL FREQUENCY (kHz)
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DS1857Dual Temperature-Controlled Resistors withExternal Temperature Input and MonitorsDS1857Typical Operating Characteristics (continued)
(VCC= 5.0V, TA= +25°C, unless otherwise noted.)
RESISTOR 0 INL (LSB)
DS1857 toc05RESISTOR 0 DNL (LSB)
DS1857 toc06RESISTOR 1 INL (LSB)
0.40.3RESISTOR 1 INL (LSB)0.20.10-0.1-0.2-0.3-0.4
DS1857 toc070.50.40.3RESISTOR 0 INL (LSB)0.20.10-0.1-0.2-0.3-0.4-0.5
025
0.250.5
0.15RESISTOR 0 DNL (LSB)0.05
-0.05
-0.15
-0.25
5075100125150175200225250
POSITION
025
5075100125150175200225250
POSITION
-0.5
025
5075100125150175200225250
POSITION
RESISTOR 1 DNL (LSB)
DS1857 toc08EXTERNAL TEMP SENSOR VOLTAGE
vs. TEMPERATURE
120100TEMPERATURE (°C)806040200-20
DS1857 toc090.25140
0.15RESISTOR 1 DNL (LSB)0.05
-0.05
-0.15
-0.25
025
5075100125150175200225250
POSITION
-40
0
0.5
1.0VOLTAGE (V)
1.5
2.0
PPM vs. POSITION
290240190ppm/°C140
+25°C TO +85°C9040-10-60
0
50
100
150POSITION
200
250
300
+25°C TO -40°CDS1857 toc10340
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Dual Temperature-Controlled Resistors withExternal Temperature Input and Monitors
Pin DescriptionsPINBALLNAMEFUNCTION1B2SDA2-Wire Serial Data Interface. This pin is for serial data transfer to and from the device.2A2SCL2-Wire Serial Clock Interface. The serial clock input is used to clock data into and out of the device.3C3A0Address Input. The address input pins specify the 2-wire address of the device (when ADFIX = 0).4A1A1Address Input. The address input pins specify the 2-wire address of the device (when ADFIX = 0).5B1A2Address Input. The address input pins specify the 2-wire address of the device (when ADFIX = 0).6C2WPENWrite Protect Enable. The device is not write protected if WPEN is connected to ground. This pin hasan internal pullup (RWPEN) (See Table 6).7C1GNDSupply Ground8D1RHIZResistor Disable Input. When high, this signal places both resistors in an off state or high impedancemode. When low, the resistors are on. This pin has an internal pullup (RRHIZ).9D3MON1External Analog Input10D4MON2External Analog Input11C4EXTTMPExternal Temperature Input. This analog signal is converted into a digital value that represents atemperature. The digitized value indexes through the look-up tables.Low-End Resistor 0 Terminal. It is not required that the low-end terminals be connected to a potential12D2L0less than the high-end terminal of the corresponding resistor. Voltage applied to any of the resistorterminals cannot exceed the power-supply voltage, VCC, or go below ground.High-End Resistor 0 Terminal. It is not required that the high-end terminals be connected to a13B3H0potential greater than the low-end terminal of the corresponding resistor. Voltage applied to any of theresistor terminals cannot exceed the power-supply voltage, VCC, or go below ground.14B4L1Low-End Resistor 1 Terminal15A4H1High-End Resistor 1 Terminal.16A3VCCSupply VoltageDetailed Description
An external temperature sense input, EXTTMP, con-The user can read the registers that monitor the VCC,verts an analog voltage into a digital value that repre-MON1, MON2, and temperature analog signals. Aftersents temperature. Its scale is defined by +10mV/°Ceach signal conversion, a corresponding bit is set thatgain and +500mV offset at 0°C. This corresponds to thecan be monitored to verify that a conversion hascharacteristics of the LM50 temperature sensor. Theoccurred. The signals also have alarm flags that notifyresistor look-up tables are stepped through accordingthe user when the signals go above or below the user-to this temperature every 2°C from -40°C to +102°C.
defined value. Interrupts can also be set for each signal.The position values of each resistor can be indepen-dently programmed. The user can assign a uniquevalue to each resistor for every 2°C increment over the-40°C to +102°C range. Both resistors can also be putin a high-impedance mode using the RHIZ pin.
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DS1857Dual Temperature-Controlled Resistors withExternal Temperature Input and MonitorsDS1857PROTAUXAD (AUXILIARY DEVICE ENABLE A0h)A0A1A2DEVICEADDRESSMD (MAIN DEVICE ENABLE)DEVICE ADDRESSADDRESSR/WADENADFIXSDA2-WIREINTERFACESCLR/WPROTMAINADDRESSEEPROM72 x 8 BIT80h-C7hMDREGISTERMONITORS LIMITHIGHMONITORS LIMITLOWRHIZH0RESISTOR 050kΩ FULL SCALE256 POSITIONSL0RHIZTEMP INDEXVCCRRHIZRHIZVCCEXTTMPMUXA/D12-BITSRAM32 x 8 BIT60h-7FhNOT PROTECTEDMINT (BIT)REGISTERRESISTOR 150kΩ FULL SCALE256 POSITIONSL1PROTMAINH1TABLESELECTEEPROM128 x 8 BIT00h-7FhSTANDARDSEEPROM72 x 8 BIT80h-C7hTABLE 02RESISTOR 0LOOK-UPTABLETABLESELECTEEPROM72 x 8 BIT80h-C7hTABLE 03RESISTOR 1LOOK-UPTABLEADPROTMAINMDPROTMAINMDADDRESSR/WADDRESSR/WADDRESSDATA BUSTEMP INDEXTEMP INDEXR/WTABLE SELECTMEASUREMENTALARM FLAGSTABLE SELECTADDRESSTABLE 01EEPROM16 x 8 BIT80h-8FhVENDORMDR/WINV1 (BIT)INV2 (BIT)APEN (BIT)MPEN (BIT)ADEN (BIT)ADFIX (BIT)MON1MON2MUXCTRLA/DCTRLMONITORS LIMIT HIGHMEASUREMENTDEVICE ADDRESSVCCVCCGNDVCCRWPENMONITORS LIMIT LOWMASKING (TMP, VCC, MON1, MON2)MINTAPENPROT AUXPROT MAINCOMP CTRLALARM FLAGSCOMPARATORINTERRUPTWPENMPENFigure 1. DS1857 Block Diagram8
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Dual Temperature-Controlled Resistors withExternal Temperature Input and Monitors
Table 1. Scales for Monitor ChannelsTable 3. Look-up Table Address forSIGNAL+FS+FS-FS-FSCorresponding Temperature ValuesSIGNAL(hex)SIGNAL(hex)Temperature127.996°C7FFF-128°C8000TEMPERATURECORRESPONDING LOOK-UPTABLE ADDRESSVCC6.55VFFFF0V0000MON12.5VFFFF0V0000<-40°C80hMON22.5VFFFF0V0000-40°C80h-38°C81hTable 2. Signal Comparison-36°C82hSIGNALFORMAT-34°C83hV——CCUnsignedMON1Unsigned+98°CC5hMON2Unsigned+100°CC6hTemperatureTwo’s complement+102°CC7h>+102°CC7hMonitored Signals
Each signal (VCC, MON1, MON2, and temperature) isavailable as a 16-bit value with 12-bit accuracy (left-jus-tified) over the serial bus. See Table1 for signal scalesMonitor Conversion Exampleand Table2 for signal format. The four LSBs should beMSB (BIN)LSB (BIN)VOLTAGE (V)masked when calculating the value.
11000000000000001.875The signals are updated every frame rate (t10000000100000001.255round-robin fashion.
frame) in aThe comparison of all four signals with the high and lowTo calculate the value of the temperature, treat theuser-defined values are done automatically. The corre-two’s complement value binary number as an unsignedsponding flags are set to 1 within a specified time ofbinary number, then convert to decimal and divide bythe occurrence of an out-of-limit condition.
256. If the result is greater than or equal to 128, thenCalculating Signal Values
subtract 256 from the result.
The LSB = 100µV for VCC, and the LSB = 38.147µV forTemperature: high byte: -128°C to +127°C signed; lowthe MON signals.
byte: 1/256°C.
To calculate the value of VCC, convert the unsigned 16-bit value to decimal and multiply by 100µV.
Temperature Bit WeightsMonitor VCCBit WeightsS26252423222120MSB21521421321221121029282-12-22-32-42-52-62-72-8LSB2726252423222120To calculate the value of MON1 or MON2, convert theTemperature Conversion Exampleunsigned 16-bit value to decimal and multiply byMSB (BIN)LSB (BIN)TEMPERATURE (°C)38.147µV.
0100000000000000VCCConversion Example0100000000001111.059010111110000000095MSB (BIN)LSB (BIN)VOLTAGE (V)1111011000000000-1010000000100000003.291101100000000000-4011000000111110004.94_____________________________________________________________________9
DS1857Dual Temperature-Controlled Resistors withExternal Temperature Input and MonitorsDS1857Table 4. ADEN Address ConfigurationADEN(ADDRESSENABLE)01NO. OF SEPARATEDEVICEADDRESSES21 (Main Device only)ADDITIONALINFORMATIONSee Figure 2See Figure 3Table 5. ADEN and ADFIX BitsADEN0011*
1
0ADFIX01011
0
AUXILIARYADDRESSA0hA0hN/AN/AA2
A1
MAIN ADDRESS*EEPROM(Table 01, 8Ch)*EEPROM(Table 01, 8Ch)A0
R/W
MAIN DEVICE ENABLEAUXILIARY DEVICE ENABLEDEC0AUXILIARY DEVICEENMAINDEVICE5Fh60hTABLE 01TABLE 02TABLE 03ENENEN80h80h80hMON LOOK-UPTABLE CONTROLR1 LOOK-UPR0 LOOK-UPTABLETABLESEL8FhSELC7hF0h199F0hSELC7hEN009596127128143EN7Fh7FhTABLE SELECTDECODERRESERVEDFFhRESERVEDFFhMEMORY PARTITION WITH ADEN BIT = 0Figure 2. Memory Organization, ADEN = 0MAIN DEVICE ENABLE0DEC05Fh60h9596127128143EN7FhTABLE SELECTDECODERTABLE 0080hTABLE 01TABLE 02TABLE 03ENENEN80h80h80hMON LOOK-UPTABLE CONTROLR1 LOOK-UPR0 LOOK-UPTABLETABLESEL8FhSELC7hF0hF0hSELC7hMAINDEVICEENAUXILIARY DEVICEEN199255FFhMEMORY PARTITION WITH ADEN BIT = 1RESERVEDFFhRESERVEDFFhFigure 3. Memory Organization, ADEN = 110____________________________________________________________________Dual Temperature-Controlled Resistors withExternal Temperature Input and Monitors
Variable Resistors
ADFIX (address fixed) determines whether the MainThe value of each variable resistor is determined by aDevice address is determined by an EEPROM bytetemperature-addressed look-up table, which can(Table01, byte 8Ch, when ADFIX =1). There can be upassign a unique value (00h to FFh) to each resistor forto 128 devices sharing a common 2-wire bus, withevery 2°C increment over the -40°C to +102°C rangeeach device having its own unique device address.
(see Table3). See the Temperature Conversionsectionfor more information.
Memory Protection
A resistor disable feature places both outputs in a high-Memory access from either device address can beimpedance mode. This occurs when the RHIZ input iseither read/write or read only. Write protection ishigh. An internal pullup of Raccomplished by a combination of control bits in RHIZis provided, readyingthis pin for input from the Tx Disable signal as specifiedEEPROM (APEN and MPEN in configuration registerin the SFF and SFP MSA.
h) and a write-protect enable (WPEN) pin. Since theWPEN pin is often not accessible from outside the mod-The variable resistors can also be used in manualule, this scheme effectively allows the module to bemode. If the TEN bit equals 0, then the resistors are inlocked by the manufacturer to prevent accidental writesmanual mode and the temperature indexing is dis-by the end user.
abled. The user sets the resistors in manual mode bySeparate write protection is provided for the Auxiliarywriting to addresses 82h and 83h in Table 01 to controland Main Device address through distinct bits APENresistors 0 and 1, respectively.
and MPEN. APEN and MPEN are bits from configura-Memory Description
tion register h, Table01. Due to the location, theMain and auxiliary memories can be accessed by twoAPEN and MPEN bits can only be written through theseparate device addresses. The Main Device addressMain Device address. The control of write privilegesis determined by address pins or value in Table 01 bytethrough the Auxiliary Device address is dependent on8Ch, when ADFIX = 1 (see Table 5). The Auxiliarythe value of APEN. Care should be taken with the set-Device address is A0h. A user option is provided toting of MPEN, once set to a 1, assuming WPEN is high,respond to one or two device addresses. This featureaccess through the Main Device is thereafter deniedcan be used to save component count in SFF applica-unless WPEN is taken to a low level. By this meanstions (Main Device address can be used) or otherinadvertent end-user write access can be denied.
applications where both GBIC (Auxiliary DeviceMain Device address space 60h to 7Fh is SRAM and isaddress can be used) and monitoring functions arenot write protected by APEN, MPEN, or WPEN. Forimplemented and two device addresses are needed.example, the user may reset flags set by the device.The memory blocks are enabled with the correspond-Bytes designated as “Reserved” may be used asing device address. Memory space from 80h and up isscratchpad but they will not be stored in a power cycleaccessible only through the Main Device address. Thisbecause of their volatility. These bytes are reserved formemory is organized as three tables; the desired tableadded functionality in future versions of this device.can be selected by the contents of memory locationNote that in single device mode (ADEN bit = 1), APEN7Fh, Main Device. The Auxiliary Device address has nodetermines the protection level of Table00, indepen-access to the tables, but the Auxiliary Device addressdent of WPEN.
can be mapped into the Main Device’s memory spaceThe write-protect operation, for both Main and Auxiliaryas a fourth table. Device addresses are programmableDevices, is summarized in Tables 6 and 7.
with two control bits in EEPROM.
Table 6. Main DeviceADEN configures memory access to respond to differ-ent device addresses (see Tables4 and 5).
WPENMPENPROTECT MAINThe default device address for EEPROM-generated0XNoaddresses is A2h.
X0NoIf the ADEN bit is 1, additional 128 bytes of EEPROM11Yesare accessible through the Main Device, selected asTable00 (see Figure3). In this configuration, theTable 7. Auxiliary DeviceAuxiliary Device address is not accessible. APEN con-trols the direction of Table 00 regardless of the settingAPENWPENPROTECT AUXILIARYof ADEN.
0XNo1XYes____________________________________________________________________11DS1857Dual Temperature-Controlled Resistors withExternal Temperature Input and MonitorsDS1857Register Map
A description of the registers is below. The registersare read only (R) or read/write (R/W). The R/W registersare writable only if write protect has not been asserted(see theMemory Descriptionsection).
Auxiliary DeviceMEMORY LOCATION(hex)00 to 7FEEPROM/SRAMEEPROMR/WR/WDEFAULT SETTING(hex)00NAME OF LOCATIONStandards DataFUNCTION—Main DeviceMEMORYLOCATION(hex)EEPROM/SRAMR/WDEFAULTSETTING(hex)NAME OF LOCATIONFUNCTIONContains upper limit settings for temperature.If the limit is violated, a flag in Main Devicebyte 70h is set.Contains lower limit settings for temperature. Ifthe limit is violated, a flag in Main Device byte70h is set.—Contains upper limit settings for VCC. If thelimit is violated, a flag in Main Device byte 70his set.Contains lower limit settings for VCC. If thelimit is violated, a flag in Main Device byte 70his set.—Contains upper limit settings for MON1. If thelimit is violated, a flag in Main Device byte 70his set.Contains lower limit settings for MON1. If thelimit is violated, a flag in Main Device byte 70his set.—Contains upper limit settings for MON2. If thelimit is violated, a flag in Main Device byte 70his set.Contains lower limit settings for MON2. If thelimit is violated, a flag in Main Device byte 70his set.00 to 01EEPROMR/W00TMPlimhi (MSB to LSB)02 to 0304 to 0708 to 09EEPROMEEPROMEEPROMR/WRR/W000000TMPlimlo (MSB to LSB)ReservedVCClimhi (MSB to LSB)0A to 0B0C to 0F10 to 11EEPROMEEPROMEEPROMR/W—R/W000000VCClimlo (MSB to LSB)ReservedMON1limhi (MSB to LSB)12 to 1314 to 1718 to 19EEPROMEEPROMEEPROMR/W—R/W000000MON1limlo (MSB to LSB)ReservedMON2limhi (MSB to LSB)1A to 1BEEPROMR/W00MON2limlo (MSB to LSB)Note:SRAM defaults are power-on defaults. EEPROM defaults are factory defaults.12
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Dual Temperature-Controlled Resistors withExternal Temperature Input and Monitors
Main Device (continued)MEMORYDEFAULTLOCATIONEEPROM/R/WSETTINGNAME OF LOCATIONFUNCTION(hex)SRAM(hex)1C to 5FEEPROM—00Reserved—60 to 61SRAMR—Measured TMPDigitized measured value for temperature.(MSB to LSB)See Table 1.62 to 63SRAMR—Measured VCCDigitized measured value for VCC.(MSB to LSB)See Table 1. to 65SRAMR—Measured MON1Digitized measured value for MON1.(MSB to LSB)See Table 1.66 to 67SRAMR—Measured MON2Digitized measured value for MON2.(MSB to LSB)See Table 1.68 to 6DSRAMR—Reserved—6ESRAM——Logic states—Resistor status bit. A high indicates that bothBit 7—RXHIZSTAresistors are in high-impedance mode. A lowindicates that both resistors are operatingnormally.Resistor control bit. Setting this bit high6—R/W0HIZCOcauses both resistors to go into a high-impedance state.5——XX—4——XX—3——XX—2——XX—1——XX—0—RXRDYBThis status bit goes high when VCC has fallenbelow the POA level.6FSRAM——Conversion updates—This bit goes high after a temperature andaddress update has occurred for theBit 7—R/W0TAUcorresponding measurement in bytes 60h to61h. This bit can be written to a 0 by the userand monitored to verify that a conversion hasoccurred.____________________________________________________________________13
DS1857Dual Temperature-Controlled Resistors withExternal Temperature Input and MonitorsDS1857Main Device (continued)MEMORYLOCATION(hex)EEPROM/SRAMR/WDEFAULTSETTING(hex)NAME OF LOCATIONFUNCTIONThis bit goes high after a VCC update hasoccurred for the corresponding measurementin bytes 62h to 63h. This bit can be written toa 0 by the user and monitored to verify that aconversion has occurred.This bit goes high after a MON1 update hasoccurred for the corresponding measurementin bytes h to 65h. This bit can be written toa 0 by the user and monitored to verify that aconversion has occurred.This bit goes high after a MON2 update hasoccurred for the corresponding measurementin bytes 66h to 67h. This bit can be written toa 0 by the user and monitored to verify that aconversion has occurred.—————This alarm flag goes high when the upper limitof the temperature setting is violated.This alarm flag goes high when the lower limitof the temperature setting is violated.This alarm flag goes high when the upper limitof the VCC setting is violated.6—R/W0VCCU5—R/W0MON1U4—R/W0MON2U321070Bit 765————SRAM———————R———0000————00XXAlarm flagsTMPhiTMPloVCChi14____________________________________________________________________
Dual Temperature-Controlled Resistors withExternal Temperature Input and Monitors
Main Device (continued)MEMORYDEFAULTLOCATIONEEPROM/R/WSETTINGNAME OF LOCATIONFUNCTION(hex)SRAM(hex)4———VCCloThis alarm flag goes high when the lower limitof the VCC setting is violated.3———MON1hiThis alarm flag goes high when the upper limitof the MON1 setting is violated.2———MON1loThis alarm flag goes high when the lower limitof the MON1 setting is violated.1———MON2hiThis alarm flag goes high when the upper limitof the MON2 setting is violated.0———MON2loThis alarm flag goes high when the lower limitof the MON2 setting is violated.71SRAMR—Alarm flags—Bit 7———X—6———X—5———X—4———X—3———X—2———X—1———X—A mask of all flags located in Table 01 byte0———MINT88h determines the value of MINT. MINT ismaskable to 0 if no interrupt is desired bysetting Table 01 byte 88h to 0.72 to 7ESRAMR00Reserved—7FSRAMR/WTable select—Bit 7——0X—6——0X—5——0X—4——0X—3——0X—2——0X—1——0Set bits = 00 to select Table 00, set bits = 01Table select bitsto select Table 01, set bits = 10 to select0——0Table 02, set bits = 11 to select Table 03.____________________________________________________________________15
DS1857Dual Temperature-Controlled Resistors withExternal Temperature Input and MonitorsDS1857Table 01hMEMORYEEPROM/LOCATIONSRAM(hex)80Bit 765432SRAM——————R/WR/W——————000000DEFAULTSETTING(hex)NAME OFLOCATIONModeXXXXXXFUNCTION———————If TEN = 0, the temperature conversions update and theresistors can be controlled manually. The user sets theresistor in manual mode by writing to addresses 82h and83h in Table 01 to control resistors 0 and 1, respectively.AEN = 0 provides manual control of the temperatureindex.This byte is the temperature-calculated index used toselect the address of resistor settings in the look-uptables.Resistor 0 position values from 00h to FFh.Resistor 1 position values from 00h to FFh.—————————————1——1TEN0——1AEN81828384 to 8788Bit 76543210Bit 76SRAMSRAMSRAMSRAMEEPROM————————EEPROM——RR/WR/W—R/W————————R/W———000000X11110000—00Temp indexResistor 0Resistor 1ReservedXTMPVCCMON1MON2XXXXConfigurationXX16____________________________________________________________________
Dual Temperature-Controlled Resistors withExternal Temperature Input and Monitors
Table 01h (continued)MEMORYDEFAULTLOCATIONEEPROM/R/WSETTINGNAME OF(hex)SRAM(hex)LOCATIONFUNCTIONControls if the device responds to one or two device5——0ADENaddresses (see the Memory Description section andTable 5).Controls the means by which Main and Auxiliary Device4——0ADFIXaddresses are set (see the Memory Description sectionand Table 5).3——0APENC ontr ol s auxi li ar y w ri t e p r otect. S ee the M em or y D escr i pt i on2——0MPENC ontr ol s auxi li a r y w ri t e p r otect. S ee the M em or y D escr i pt i on1——0X—0——0X—8A to 8BEEPROM—00Reserved—8CEEPROMR/WA2Device addressContains Main Device address if the bit ADFIX = 1. IfADFIX = 0, then address pins determine the address.8D to 8FEEPROM——Reserved—Table 02hMEMORYDEFAULTLOCATIONEEPROM/R/WSETTINGNAME OF LOCATIONFUNCTION(hex)SRAM(hex)80 to C7EEPROMR/WFFResistor 0 Temp LUTLook-up table for Resistor 0.F0 to FFEEPROMRFFReserved—Table 03hMEMORYDEFAULTLOCATIONEEPROM/SETTINGNAME OF LOCATIONFUNCTION(hex)SRAMR/W(hex)80 to C7EEPROMR/WFFResistor 1 Temp LUTLook-up table for Resistor 1.F0 to FFEEPROMRFFReserved—____________________________________________________________________17
DS1857Dual Temperature-Controlled Resistors withExternal Temperature Input and MonitorsDS1857Temperature Conversion
Temperature is sensed from an external sensor. The sen-sor’s scale is +10mV/°C for gain and +500mV for offset at0°C. The DS1857 accommodates a temperature range of-40°C to 102°C for its look-up tables. The resistor look-uptables are stepped through according to this temperatureevery 2°C. The relationship between the voltage and tem-perature is shown in Equation 2.
T=V−0.5V10mV(1)M6M5DECREASING TEMPERATUREMEMORY LOCATIONM4M3M2INCREASING TEMPERATUREThe direct-to-digital temperature sensor measures tem-perature through the use of an on-chip temperaturemeasurement technique with an operating range from -40°C to +102°C. Temperature conversions are initiatedupon power-up, and the most recent conversion isstored in memory locations 60h and 61h of the MainDevice, which are updated every tframe. Temperatureconversions do not occur during an active read or writeto memory.
The value of each resistor is determined by the tempera-ture-addressed look-up table. The look-up tableassignsa unique value to each resistor for every 2°C incrementwith a 1°C hysteresis at a temperature transition over theoperating temperature range (see Figure 4).
M1246TEMPERATURE (°C)81012Figure 4. Look-Up Table Temperature Hysteresisthe first VCCanalog-to-digital conversion occurs andsets or clears the flag accordingly.
2-Wire OperationClock and Data Transitions: The SDA pin is normallypulled high with an external resistor or device. Data onthe SDA pin may only change during SCL-low timeperiods. Data changes during SCL-high periods willindicate a start or stop condition depending on the con-ditions discussed below. See the timing diagrams inFigures 5 and 6 for further details.
Start Condition: A high-to-low transition of SDA withSCL high is a start condition, which must precede anyother command. See the timing diagrams in Figures 5and 6 for further details.
Stop Condition: A low-to-high transition of SDA withSCL high is a stop condition. After a read or writesequence, the stop command places the DS1857 into alow-power mode. See the timing diagrams in Figures 5and 6 for further details.
Acknowledge: All address and data bytes are trans-mitted through a serial protocol. The DS1857 pulls theSDA line low during the ninth clock pulse to acknowl-edge that it has received each word.
Standby Mode: The DS1857 features a low-powermode that is automatically enabled after power-on,after a stop command, and after the completion of allinternal operations.
Device Addressing: The DS1857 must receive an 8-bitdevice address word following a start condition to enablea specific device for a read or write operation. Theaddress word is clocked into this part’s MSB to LSB. Theaddress byte consists of Ah (1010) followed by the valueof the address pins (A1, A2, and A0)then the R/W bit. This
Power-Up and Low Voltage Operation
During power-up, the device is inactive until VCCexceeds the digital power-on-reset voltage (POD). Atthis voltage, the digital circuitry, which includes the 2-wire interface, becomes functional. However, EEPROMbacked registers/settings cannot be internally read(recalled into shadow SRAM) until VCCexceeds theanalog power-on-reset voltage (POA) at which time theremainder of the device becomes fully functional. OnceVCC exceeds POA, the RDYB bit in byte 6Eh of theMain Device memory is timed to go from a 1 to a 0 andindicates when analog to digital conversions begin. IfVCC ever dips below POA, the RDYB bit will read as a1 again. Once a device exceeds POA and the EEP-ROM is recalled, the values remain active (recalled)until VCCfalls below POD.
For 2-wire device addresses sourced from EEPROM(ADFIX = 1), the device address defaults to theaddress determined by the address pins until VCCexceeds POA and the EEPROM values are recalled.The Auxiliary Device (A0h) is always available withinthis voltage window (between POD and the EEPROMrecall) regardless of the programmed state of ADEN. Furthermore, as the device powers-up, the VCClo alarmflag (bit 4 of 70h in Main Device) will default to a 1 until
18
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Dual Temperature-Controlled Resistors withExternal Temperature Input and Monitors
byte must match the address programmed into Table01first bytes sent are overwritten. Only the last 8 bytes of8Ch or A0h (for the Auxiliary Device). If a device addressdata are written to the page.
match occurs, this part will output a zero for one clockcycle as an acknowledge and the corresponding block ofAcknowledge Polling: Once the internally timed writememory is enabled (see the Memory Organizationsec-has started and the DS1857 inputs are disabled,tion). If the R/W bit is high, a read operation is initiated. Ifacknowledge polling can be initiated. The processthe R/W is low, a write operation is initiated (see theinvolves transmitting a start condition followed by theMemory Organizationsection). If the address does notdevice address. The R/W bit signifies the type of opera-match, this part returns to a low-power mode.
tion that is desired. The read or write sequence will onlybe allowed to proceed if the internal write cycle hasWrite Operations
completed and the DS1857 responds with a zero.
After receiving a matching address byte with the R/Wbit set low, provided there is no write protect, theRead Operations
device goes into the write mode of operation (see theAfter receiving a matching address byte with the R/W bitMemory Organizationsection). The master must trans-set high, the device goes into the read mode of opera-mit an 8-bit EEPROM memory address to the device totion. There are three read operations: current addressdefine the address where the data is to be written. Afterread, random read, and sequential address read.the byte has been received, the DS1857 transmits aCurrent Address Read
zero for one clock cycle to acknowledge the addressThe DS1857 has an internal address register that main-has been received. The master must then transmit antains the address used during the last read or write8-bit data word to be written into this address. Theoperation, incremented by one. This data is maintainedDS1857 again transmits a zero for one clock cycle toas long as Vacknowledge the receipt of the data. At this point, thethe last byte in memory, then the register resets to theCCis valid. If the most recent address wasmaster must terminate the write operation with a stopfirst address.
condition. The DS1857 then enters an internally timedwrite process twto the EEPROM memory. All inputs areOnce the device address is clocked in and acknowl-disabled during this byte write cycle.
edged by the DS1857 with the R/W bit set to high, thecurrent address data word is clocked out. The masterPage Write
does not respond with a zero, but does generate a stopThe DS1857 is capable of an 8-byte page write. A pagecondition afterwards.
is any 8-byte block of memory starting with an addressevenly divisible by eight and ending with the startingSingle Read
address plus seven. For example, addresses 00hA random read requires a dummy byte write sequence tothrough 07h constitute one page. Other pages wouldload in the data byte address. Once the device and databe addresses 08h through 0Fh, 10h through 17h, 18haddress bytes are clocked in by the master, andthrough 1Fh, etc.
acknowledged by the DS1857, the master must generateanother start condition. The master now initiates a currentA page write is initiated the same way as a byte write,address read by sending the device address with thebut the master does not send a STOP condition afterR/W bit set high. The DS1857 acknowledges the devicethe first byte. Instead, after the slave acknowledges theaddress and serially clocks out the data byte.
data byte has been received, the master can send upto seven more bytes using the same nine-clockSequential Address Read
sequence. The master must terminate the write cycleSequential reads are initiated by either a currentwith a STOP condition or the data clocked into theaddress read or a random address read. After the mas-DS1857 will not be latched into permanent memory.ter receives the first data byte, the master respondsThe address counter rolls on a page during a write. Thewith an acknowledge. As long as the DS1857 receivescounter does not count through the entire addressthis acknowledge after a byte is read, the master canspace as during a read. For example, if the startingclock out additional data words from the DS1857. Afteraddress is 06h and 4 bytes are written, the first bytereaching address FFh, it resets to address 00h.goes into address 06h. The second goes into addressThe sequential read operation is terminated when the07h. The third goes into address 00h (not 08h). Themaster initiates a stop condition. The master does notfourth goes into address 01h. If more than 9 bytes orrespond with a zero.
more are written before a STOP condition is sent, the
For a more detailed description of 2-wire theory ofoperation, see the following section.
____________________________________________________________________
19
DS1857Dual Temperature-Controlled Resistors withExternal Temperature Input and MonitorsDS18572-Wire Serial Port OperationThe 2-wire serial port interface supports a bidirectionaldata transmission protocol with device addressing. Adevice that sends data on the bus is defined as a trans-mitter, and a device receiving data as a receiver. Thedevice that controls the message is called a master.The devices that are controlled by the master areslaves. The bus must be controlled by a master devicethat generates the serial clock (SCL), controls the busaccess, and generates the start and stop conditions.The DS1857 operates as a slave on the 2-wire bus.Connections to the bus are made through the open-drain I/O lines SDA and SCL. The following I/O termi-nals control the 2-wire serial port: SDA, SCL. Timingdiagrams for the 2-wire serial port can be found inFigures 5 and 6. Timing information for the 2-wire serialport is provided in the AC Electrical Characteristicstablefor 2-wire serial communications.
The following bus protocol has been defined:•
Data transfer may be initiated only when the bus isnot busy.•During data transfer, the data line must remain
stable whenever the clock line is high. Changes inthe data line while the clock line is high will beinterpreted as control signals.
Accordingly, the following bus conditions have beendefined:
Bus not busy: Both data and clock lines remain high.Start data transfer: A change in the state of the dataline from high to low while the clock is high defines astart condition.
Stop data transfer: A change in the state of the dataline from low to high while the clock line is high definesthe stop condition.
Data valid: The state of the data line represents validdata when, after a start condition, the data line is stablefor the duration of the high period of the clock signal. Thedata on the line can be changed during the low period ofthe clock signal. There is one clock pulse per bit of data.Figures 5 and 6 detail how data transfer is accomplishedon the 2-wire bus. Depending upon the state of the R/Wbit, two types of data transfer are possible.
Each data transfer is initiated with a start condition andterminated with a stop condition. The number of databytes transferred between start and stop conditions isnot limited and is determined by the master device. Theinformation is transferred byte-wise and each receiveracknowledges with a ninth bit.
Within the bus specifications a regular mode (100kHzclock rate) and a fast mode (400kHz clock rate) aredefined. The DS1857 works in both modes.
Acknowledge: Each receiving device, whenaddressed, is obliged to generate an acknowledgeafter the byte has been received. The master devicemust generate an extra clock pulse which is associatedwith this acknowledge bit.
A device that acknowledges must pull down the SDAline during the acknowledge clock pulse in such a waythat the SDA line is a stable low during the high periodof the acknowledge related clock pulse. Setup andhold times must be taken into account. A master mustsignal an end of data to the slave by not generating anacknowledge bit on the last byte that has been clockedout of the slave. In this case, the slave must leave thedata line high to enable the master to generate the stopcondition.
1)Data transfer from a master transmitter to a slave
receiver. The first byte transmitted by the master isthe command/control byte. Next follows a numberof data bytes. The slave returns an acknowledgebit after each received byte.
2)Data transfer from a slave transmitter to a master
receiver. The master transmits the first byte (thecommand/control byte) to the slave. The slavethen returns an acknowledge bit. Next follows anumber of data bytes transmitted by the slave tothe master. The master returns an acknowledgebit after all received bytes other than the last byte.At the end of the last received byte, a notacknowledge can be returned.
The master device generates all serial clock pulses andthe start and stop conditions. A transfer is ended with astop condition or with a repeated start condition. Sincea repeated start condition is also the beginning of thenext serial transfer, the bus will not be released.
The DS1857 can operate in the following three modes:1)Slave Receiver Mode:Serial data and clock are
received through SDA and SCL, respectively.After each byte is received, an acknowledge bit istransmitted. Start and stop conditions are recog-nized as the beginning and end of a serial trans-fer. Address recognition is performed by hardwareafter the slave (device) address and direction bithave been received.
2)Slave Transmitter Mode:The first byte is
received and handled as in the slave receivermode. However, in this mode the direction bit indi-cates that the transfer direction is reversed. Serial
20____________________________________________________________________
Dual Temperature-Controlled Resistors withExternal Temperature Input and Monitors
data is transmitted on SDA by the DS1857, whileappropriate device address bits, and the read/write bit,the serial clock is input on SCL. Start and stopthe slave device outputs an acknowledge signal on theconditions are recognized as the beginning andSDA line.
end of a serial transfer.
3)Slave Address:Command/control byte is the first
Chip Topologybyte received following the start condition from theTRANSISTOR COUNT: 44149
master device. The command/control byte con-SUBSTRATE CONNECTED TO GROUND.
sists of a 4-bit control code. For the DS1857, thisis set as 1010binary for read/write operations. Thenext three bits of the command/control byte arethe device select bits or device address. They areused by the master device to select which of eightpossible devices on the bus is to be accessed.When reading or writing the DS1857, the device-select bits must match one of two valid deviceaddresses 00h, or the address registered in Table01 location 8Ch. The last bit of the command/con-trol byte (R/W) defines the operation to be per-formed. When set to a ‘1’ a read operation isselected, and when set to a ‘0’ a write operation isselected. The slave address can be set by theEEPROM.
Following the start condition, the DS1857 monitors theSDA bus checking the device type identifier beingtransmitted. Upon receiving the 1010 control code, the
SDAMSBSLAVE ADDRESSR/WDIRECTIONACKNOWLEDGEMENTBITSIGNAL FROM RECEIVERACKNOWLEDGEMENTSIGNAL FROM RECEIVERSCL1267123–7STARTACKACKSTOPCONDITIONCONDITIONREPEATED IF MORE BYTESOR REPEATEDARE TRANSFERREDSTART CONDITIONFigure 5. 2-Wire Data Transfer Protocol____________________________________________________________________21
DS1857Dual Temperature-Controlled Resistors withExternal Temperature Input and MonitorsDS1857SDAtBUFtLOWtRtFtHD:STAtSPSCLtHD:STASTOPSTARTtHD:DATtHIGHtSU:DATREPEATEDSTARTtSU:STAtSU:STOFigure 6. 2-Wire AC Characteristics
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22____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600©2002 Maxim Integrated Products
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is a registered trademark of Maxim Integrated Products.
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