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METHOD FOR MANUFACTURING AN INTERCONNECT STRUCTURE

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专利名称:METHOD FOR MANUFACTURING AN

INTERCONNECT STRUCTURE FOR STACKEDSEMICONDUCTOR DEVICE

发明人:Tadatomo Suga申请号:US09997878申请日:20011130

公开号:US20020074670A1公开日:20020620

专利附图:

摘要:In a multi-layer interconnection structure, the wiring length is to be reduced,and the interconnection is to be straightened, at the same time as measures need to be

taken against radiation noise. To this end, there is disclosed a semiconductor device inwhich plural semiconductor substrates, each carrying semiconductor elements, arebonded together. On each semiconductor substrate is deposited an insulating layerthrough which is formed a connection wiring passed through the insulating layer so as tobe connected to the interconnection layer of the semiconductor element. On a junctionsurface of at least one of the semiconductor substrates is formed an electricallyconductive layer of an electrically conductive material in which an opening is bored inassociation with the connection wiring. The semiconductor substrates are bondedtogether by the solid state bonding technique to interconnect the connection wiringsformed on each semiconductor substrate.

申请人:SUGA TADATOMO

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