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专利名称：DECIMAL MULTIPLIER发明人：OOISHI HIROMI申请号：JP14121784申请日：19840706公开号：JPS6120133A公开日：19860128
摘要：PURPOSE:To omit operation for adding a carried-up value and to improve anoperating speed by executing the addition of a value carried-up from the lower digitsimultaneously with multiplication. CONSTITUTION:A multiplicator is set up in a
multiplication register 12 for a decimal multiplier. Then, respective digits of a multiplicandare successively extracted from the least significant digit and inputted to the decimalmultiplier to obtain a multiplied value. In case of a multiplicand of m digits, a partialmultiplicator of (m+1) digits at maximum is formed, so that a partial multiplied value of mdigits can be obtained by repeating multiplication m times. Finally, a multiplicand ''0'' isinputted and the partial multiplied value of (m+1) digits, i.e. a value generated by the m-th multiplication and stored in a carrying-up part register 13, is outputted to an outputline 16. The carried-up value to its upper digit at the time of multiplication is stored in acarried-up value register 13 and the addition of the carried-up value from its lower digit issimultaneously executed by the multiplication circuit 15.
申请人：NIPPON DENKI KK
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